Obviously, being ROM, only constants can be stored here.Ī fourth memory area is also off-chip, starting at X:0000.
#KEIL COMPILER CODE#
The CODE segment is accessed via the program counter (PC) for opcode fetches and by DPTR for data. It typically runs from C:0000 to C:0FFFFH (65536 bytes) but as it is held within an external EPROM, it can be any size up to 64KB (65536 bytes). Just to confuse things, the normal directly addressable RAM from 0-80H can also be indirectly addressed by the MOV instruction!Ī third memory space, the CODE segment, also starts at zero, but this is reserved for the program. As it is only indirectly addressable, it is best left for stack use, which is, by definition, always indirectly addressed via the stack pointer SP. This constitutes an extended on-chip RAM area and was added to the ordinary 8051 design when the 8052 appeared.
![keil compiler keil compiler](https://i.stack.imgur.com/u4Fle.png)
It is only accessible via indirect addressing (MOV and effectively overlays the directly addressable sfr area. However, a second memory area exists between 80H and 0FFH which is only indirectly addressable and is prefixed by I: and known as IDATA. Above 80H the special function registers are located, which are again directly addressable. It is directly addressable, so that instructions like 'MOV A,x' are usable. This RAM can be used for program variables. This starts at D:00 (the 'D:' prefix implies DATA segment) and ends at 07fH (127 decimal). Within the CPU there is one such, the DATA on-chip RAM. Other microcontrollers, such as the 68HC11, have a single Von Neuman memory configuration, where memory areas are located at sequential addresses, regardless of in what device they physically exist. Perhaps the most initially confusing thing about the 8051 is that there are three different memory spaces, all of which start at the same address. The most basic decision to be made is which memory model to use.įor general information on the C language, number and string representation, please refer to a standard C textbook such as K & R 2.1 8051 Memory Configurations 2.1.1 Physical Location Of The Memory Spaces However, to get the best from it, some appreciation of the underlying hardware is desirable.
![keil compiler keil compiler](https://i.stack.imgur.com/fcOGh.png)
The Keil C51 compiler has been written to allow C programmers to get code running quickly on 8051 systems with little or no learning curve.
![keil compiler keil compiler](https://onlinedocs.microchip.com/pr/GUID-4E095027-601A-4343-844F-2034603B4C9C-en-US-4/GUID-C007FE75-C2AD-457B-B26C-59A8E22CE2D2-low.png)
I'm porting the real-time kernel TNeoKernel to the Cortex-M architecture, so I've installed Keil and am trying to build the kernel.